In this paper, we propose a field programmable gate array (FPGA) implementation of a\none-dimensional convolution neural network (1D-CNN) demodulator for binary phase shift keying\n(BPSK). The 1D-CNN demodulator includes two 1D-CNNs and a decision module. Discrete time\nseries of BPSK signals are imported into the well-trained 1D-CNNs. The 1D-CNNs detect the phase\nshiftsââ?¬â?¢ moment and type, including phase shift from 0 to Ãâ?¬ and that from Ãâ?¬ to 0. The decision module\ncombines results of the two 1D-CNNs and outputs the demodulated data. In order to improve the\nefficiency of resource utilization and operation speed of the FPGA circuit, a time-delay network for\nconvolutional calculation and a structure for piecewise approximation for the activation function\nwere designed. To enhance the performance of the 1D-CNN demodulator, universal and diversity\ntraining data considering five impact factors were generated specially. Experimental results under\ndifferent channel conditions show that the proposed demodulator has good adaptability to frequency\noffset and short latency. The demodulation loss of the proposed demodulator can almost be kept\nwithin 2 dB.
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